IBM PPC440X5 Manual do Utilizador descarregar pdf (Página 406)

100

101

sraw

Shift Right Algebraic Word

PPC440x5 CPU Core User’s Manual Preliminary

Page 406 of 589

instrset.fm.

September 12, 2002

sraw

Shift Right Algebraic Word

n ← (RB)

26:31

r ← ROTL((RS), 32 – n)

if n < 32 then

← MASK(n, 31)

else

←

← (RS)

(RA) ← (r ∧ m) ∨ (

s ∧¬m)

XER[CA]

← s ∧ ((r ∧¬m) ≠ 0)

The contents of register RS are shifted right by the number of bits specified the contents of register RB

26:31

Bits shifted out of the least significant bit are lost. Bit 0 of Register RS is replicated to fill the vacated positions

on the left. The result is placed into register RA.

If register RS contains a negative number and any 1-bits were shifted out of the least significant bit position,

XER[CA] is set to 1; otherwise, it is set to 0.

Note that if RB

= 1, then the shift amount is 32 bits or more, and thus all bits are shifted out such that

Registers Altered

•RA

• XER[CA]

• CR[CR0] if Rc contains 1

sraw RA, RS, RB Rc=0

sraw. RA, RS, RB Rc=1

31 RS RA RB 792 Rc

0 6 11 16 21 31

1 2 ... 401 402 403 404 405 406 407 408 409 410 411 ... 589 590

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